AFM ’ 08 : Third Workshop on Automated Formal Methods 14 July 2008 Princeton , New Jersey
نویسندگان
چکیده
We present Simulink Design Verifier, a tool distributed by The MathWorks to help Simulink users in their verification and validation activities. Simulink Design Verifier automatically generates test input sequences for a model or proves properties about this model. The tool is based on automatic theorem proving and model-checking techniques and aims at a high level of integration with Simulink to make formal verification techniques easier to incorporate into engineers’ workflows. In this presentation, we describe the tool, highlight some of the technical choices that were made during its conception, and discuss user experiences with it.
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